Embedded Systems MCQ’S

Embedded Systems mcqs

1. Which can be considered as the lower level in the multitasking operating system?

a) process

b) task

c) threads

d) multi threads

 

2. Which of the following are the pin efficient method of communicating between

other devices?

a) serial port

b) parallel port

c) peripheral port

d) memory port

 

3.  Which of the following allows a lower priority task to run despite the higher priority task is active and waiting to pre-empt?

a) message queue

b) message passing

c) semaphore

d) priority inversion

 

4. Which of the following is an ideal interface for LCD controllers?

a) SPI

b) Parallel port

c) Serial port

d) M-Bus

 

5. What is the purpose of address bus?

a) to provide data to and from the chip

b) to select a specified chip

c) to select a location within the memory chip

d) to select a read/write cycle

 

7. Which of the following depends the number of bits that are transferred?

a) wait statement

b) ready statement

c) time

d) counter

8. Into how many parts does the interrupt can split the software?

a) 2
 
b) 3
 
c) 4
 
d) 5

 

 

9. Which of the following can simulate the LCD controllers and parallel ports?

a) memory simulator

b) sds

c) input simulator

d) output tools

 

10. How many categories are there for the low-level simulation?

a) 2

b) 3

c) 4

d) 5

 

 11. Which of the following allows the reuse of the software and the hardware components?

a) Platform based design

b) Memory design

c) Peripheral design

d) Input design

 

12. Which design activity helps in the transformation of the floating point arithmetic to a fixed point arithmetic?

a) High-level transformation

b) Scheduling

c) Compilation

d) task-level concurrency management

 

13. What does the processor fetches from the EPROM if the board is powered?

a) Reset vector

b) Ready vector

c) Start vector

d) Acknowledge vector

 

14. Which are the major inter process communication mechanism?

a) Shared Memory

b) Software Interrupt

c) Message Passing

d) All of these

 

15. Which of the following is approximated during hardware/software partitioning, during task- level concurrency management?

a) Scheduling

b) Compilation

c) task-level concurrency management

d) High-level transformation

 

16. Which activity is concerned with identifying the task at the final embedded systems?

a) High-level transformation

b) Compilation

c) Scheduling

d) task-level concurrency management

 

17. Which design activity is in charge of mapping operations to hardware?

a) Scheduling

b) High-level transformation

c) hardware/software partitioning

d) Compilation

 

18. What does API stand for?

a) Address programming interface

b) Application programming interface

c) Accessing peripheral through interface

d) Address programming interface

 

19. Which of the following is the design in which both the hardware and software are considered during the design?

a) Platform based design

b) Memory based design

c) software/hardware code sign

d) Peripheral design

 

20. In which design activity, the loops are interchangeable?

a) Compilation

b) Scheduling

c) High-level transformation

d) hardware/software partitioning

 

21. Name the processor which helps in floating point calculations.

 a) Microprocessor

b) Microcontroller

c) Coprocessor

d) Controller

 

22. Which of the following is the objective of the embedded system?

a) To introduce the building blocks of embedded system.

b) To make the students understand I/O interfacing and bus communication

c) To educate the designing of RTOS based embedded systems

d) All of the above

 

23. Which of the following is not a types of embedded system?

a) Small scale embedded system

b) Medium scale embedded system

c) Large scale embedded system

d) Sophisticated embedded system

 

24. How many general purpose processors are there in the world?

a) 5

b) 4

c) 7

d) 6

 

25. Which of the following are the units of the embedded system?

a) Program Flow control Unit

b) Execution Unit

c) None of the above

d) Both a and b

 

26. What are the various types of memory in embedded systems?

a) RAM (internal External)

b) ROM/PROM/EEPROM/Flash

c) Cache memory

d) All of the above

 

27.Which of the following is a meet-in-the-middle approach?

a) peripheral based design

b) platform based design

c) memory based design

d) processor design

 

28. Which of the following is a process of analysing the set of possible designs?

 a) Design space exploration

b) Scheduling

c) Compilation

d) hardware/software partitioning

 

29. Which of the following device can transfer the vector table from the EPROM?

a) RAM

b) ROM

c) CPU

d) Peripheral

 

30. Which of the following decides which task can have the next time slot?

a) Single task operating system

b) Applications

c) Kernel

d) Software

1.    31.What do you mean by micro in microcontroller?

 

  a)Distance between 2 IC’s
 
 b) Distance between 2 transistors
 
 c) Size of a controller
 
 d) Distance between 2 pins
 
 32. What is the bit size of the 8051 microcontroller?
 
 a) 8-bit
 
 b) 4-bit
 
 c) 16-bit
 
 d) 32-bit

 

3.    33.Name the architecture and the instruction set for microcontroller?

 

 
 a) Van- Neumann Architecture with CISC Instruction Set
 
 b) Harvard Architecture with CISC Instruction Set
 
 c) Van- Neumann Architecture with RISC Instruction Set
 
 d) Harvard Architecture with RISC Instruction Set

 

4.     34.Number of I/O ports in the 8051 microcontroller?

 

 
  a) 3 ports
  
  b) 4 ports
 
  c) 5 ports
 
  d) 4 ports with last port having 5 pins

 

5.      35. Is ROM is used for storing data storage?

 

 a) True  
  
b) False

 

 

  36. SCON in serial port is used for which operation?
 
 a) Transferring data
 
 b) Receiving data
 
 c) Controlling
 
 d) Controlling and transferring
 
 37.Program counter stores what?
 
 a) Address of before instruction
 
 b) Address of the next instruction
 
 c) Data of the before execution to be executed
 
 d) Data of the execution instruction

 

 

 38.Which pin provides a reset option in 8051?
 
 a) Pin 1
 
 b) Pin 8
 
 c) Pin 11
 
 d) Pin 9

 

 

 39. External Access is used to permit ____________
 
 a) Peripherals
 
 b) Power supply
 
 c) ALE
 
 d) Memory interfacing

 

 

40.  What is the address range of SFRs?
 
a) 80h to feh
 
b) 00h to ffh
 
c) 80h to ffh
 
d) 70h to 80h

 

 

41. How many interrupts are there in micro controller?
 
a) 3
 
b) 6
 
c) 4
 
d) 5

 

 

42.  Timer 0 is a ________ bit register.
 
a) 32-bit
 
b) 8-bit
 
c) 16-bit
 
d) 10-bit

 

 

43.  Number of pins in 8051 microcontroller with ________ package.
 
a) 40 pin with LLC
 
b) 60 Pin with QFP
 
c) 40 pin with DIP
 
d) 60 pin with QFP

 

 

44. Reset work is __________
 
a) To make program counter zero but values in registers values are made as zero
 
b) Program counter is not zero but values in registers values are made as
Zero
 
c) Program counter not zero but values in registers values remain same
 
d) To make program counter zero but values in registers values remain same

 

 

45. What is the minimum no of cycles required for reset operation?
 
a) 3 cycle
 
b) 2 cycles
 
c) 1 cycles
 
d) 4 cycles

 

 

46.  PSEN stands for ________
 
a) Program Select Enable
 
b) Peripheral Store Enable
 
c) Program Store Enable
 
d) Peripheral Select Enable

 

 

47. What is the operation for mode 0?
 
a) 13-bit timer mode, 8-bit timer/counter THx and TLx as 5-bit prescalar
 
b) 16-bit timer mode, 16-bit timer/counter THx and TLx are cascaded, no prescalar
 
c) 8-bit auto reload mode, 8-bit auto reload time/counter; THx holds a value which is to be reloaded into TLx each time it overflows
 
d) Spilt timer mode

 

 

48. What is the operation for mode 1?
 
a) 13-bit timer mode, 8-bit timer/counter THx and TLx as 5-bit prescalar
 
b) 16-bit timer mode, 16-bit timer/counter THx and TLx are cascaded, no prescalar
 
c) 8-bit auto reload mode, 8-bit auto reload time/counter; THx holds a value which is to be reloaded into TLx each time it overflows
 
d) Spilt timer mode

 

 

49.  Which is the operation for mode 2?
 
a) 13-bit timer mode, 8-bit timer/counter THx and TLx as 5-bit prescalar
 
b) 16-bit timer mode, 16-bit timer/counter THx and TLx are cascaded, no prescalar
 
c) 8-bit auto reload mode, 8-bit auto reload time/counter; THx holds a value which is to be reloaded into TLx each time it overflows
 
d) Spilt timer mode

 

 

 50. Which is the operation for mode 3?
 
a) 13-bit timer mode, 8-bit timer/counter THx and TLx as 5-bit prescalar
 
b) 16-bit timer mode, 16-bit timer/counter THx and TLx are cascaded, no prescalar
 
c) 8-bit auto reload mode, 8-bit auto reload time/counter; THx holds a value which is to be reloaded into TLx each time it overflows
 
d) Spilt timer mode

 

 

51. Function of IE1 in TCON register?
 
a) External interrupt 1 Edge flag. Not related to timer operations
 
b) External interrupt 1 Edge flag. Not related to timer operations
 
c) External interrupt 0 single type control bit
 
d) External interrupt 1 to be triggered by a falling edge signal

 

 

52. 8051 controller contains how many registers?
 
a) 5
 
b) 3
 
c) 1
 
d) 2
 

 

 

53. General purpose memory is called as ________
 
a) ROM memory
 
b) RAM memory
 
c) SRAM memory
 
d) EPROM memory
 

 

 

  54.  Which timer register has both timers in it?
 
  a) TMOD
 
  b) TCON 
 
  c) Both TMOD and TCON
 
  d) Neither TMOD nor TCON
 

 

25   55. What are  the Embedded firmware Desgin Approaches ?

a)      a)The super Loop based approach

b)      b)The embedded operating system (os) based approach

c)      c)  Both a and b

d)     d)  None of the above

 

         56. The internal RAM memory of the 8051 is:

 a)

32 bytes

 b)

64 bytes

 c)

128 bytes

 d)

256 bytes 

27       

        57. MOV A, @ R1 will:

A.

copy R1 to the accumulator

B.

copy the accumulator to R1

C.

copy the contents of memory whose address is in R1 to the accumulator

D.

copy the accumulator to the contents of memory whose address is in R1

 

28   58.  An alternate function of port pin P3.4 in the 8051 is:

A.

Timer 0

B.

Timer 1

C.

interrupt 0

D.

interrupt 1

29   

       59. The 8051 has ________ parallel I/O ports.

      a) 2

      b)3

      c) 4

      d)5

 

60.  When the 8051 is reset and the EA line is LOW, the program counter points to the first program instruction in the:
a) internal code memory
b) external code memory
c) internal data memory
d)external data memory

61. In real time operating system ____________

a) all processes have the same priority

b) a task must be serviced by its deadline period

c) process scheduling can be done only once

d) kernel is not required

 

62.       Hard real time operating system has ______________ jitter than a soft real time operating system.

a) less

b) more

c) equal

d) none of the mentioned

 

63.       For real time operating systems, interrupt latency should be ____________

a) minimal

b) maximum

c) zero

d) dependent on the scheduling

 

64.    In rate monotonic scheduling ____________

a) shorter duration job has higher priority

b) longer duration job has higher priority

c) priority does not depend on the duration of the job

d) none of the mentioned

 

65.  In which scheduling certain amount of CPU time is allocated to each process?

a) earliest deadline first scheduling

b) proportional share scheduling

c) equal share scheduling

d) none of the mentioned

 

66. The problem of priority inversion can be solved by ____________

a) priority inheritance protocol

b) priority inversion protocol

c) both priority inheritance and inversion protocol

d) none of the mentioned

 

67. Time duration required for scheduling dispatcher to stop one process and start another is known as ____________

a) process latency

b) dispatch latency

c) execution latency

d) interrupt latency

 

68.VxWorks is centered around ____________

a) wind microkernel

b) linux kernel

c) unix kernel

d) none of the mentioned

 

69. What is the disadvantage of real addressing mode?

a) there is a lot of cost involved

b) time consumption overhead

c) absence of memory protection between processes

d) restricted access to memory locations by processes

 

70.    Preemptive, priority based scheduling guarantees ____________

a) hard real time functionality

b) soft real time functionality

c) protection of memory

d) none of the mentioned

 

71.   Real time systems must have ____________

a) preemptive kernels

b) non preemptive kernels

c) preemptive kernels or non preemptive kernels

d) neither preemptive nor non preemptive kernels

 

72.   Real time systems need to __________ the interrupt latency.

a) minimize

b) maximize

c) not bother about

d) none of the mentioned

 

73.   Priority inversion is solved by use of _____________

a) priority inheritance protocol

b) two phase lock protocol

c) time protocol

d) all of the mentioned

 

74.   In a ______ real time system, it is guaranteed that critical real time tasks will be completed within their deadlines.

a) soft

b) hard

c) critical

d) none of the mentioned

 

75.   Some of the properties of real time systems include ____________

a) single purpose

b) inexpensively mass produced

c) small size

d) all of the mentioned

 

76.   Which of the following are header files?

a) #include

b) file

c) struct()

d) proc()

 

77.   An identifier’s storage class determines?

a)    The time during which the identifier exists in memory

b)    Which function is to use

c)    Where to store the program

d)    None of them

 

78.    Which of the following is not a class specifier in c++?

a)    Auto

b)    Register

c)    Extern

d)    Mat

 

 79.   An identifier’s storage class determines?

a)    The time during which the identifier exists in memory

b)    Which function is to use

c)    Where to store the program

d)    None of them

 

80.   How many storage classes specifies are offered by C++ ?

a)       2

b)      3

c)       4

d)      5            

 

81. which of the following is not a storage class specifier?

a) auto

b) register

c) extern

d) volatile

 

82. what is the initial value of register storage class specifier?

A. 0

 

B. Null

 

C. Garbage

 

D. Infinite

 

 

83. What is the scope of extern class specifier?

 

A. Within block

 

B. Within Program

 

C. Global Multiple files

 

D. None of the above

 

 

84. What is the scope of static class specifier?

 

A. Within block

 

B. Within Program

 

C. Global Multiple files

 

D. None of the above

 

 

85. what is the initial value of extern storage class specifier?

 

A. 0

 

B. Null

 

C. Garbage

 

D. Infinite

 

 

86. An identifier’s storage class determines

 

 

A. The time during which the identifier exists in memory
 
B. Which function is to use
 
C. Where to store the program
 
D. None of them

 

 

 

87. how many storage classes in c?
 
A. 2
 
B. 3
 
C. 4
 
D. 5

 

 

 

88. The keyword used to transfer control from a function back to the calling function is
 

 

 

A. switch
 
B. goto
 
C. return
 
D. exit

 

 

89. What is the default return type if it is not specified in function definition?

 

A. void

 

 
B. int
 
C. float
 
D. short int

 

 

90. A pointer is

 

A. A variable that stores address of an instruction

 

 
B. A variable that stores address of other variable
 
C. A keyword used to create variables
 
D. None of these